6.1.4 Describe how buses link the processor, the random access memory, the rea-only memory and cache.
(No teaching notes for this one.
JSR Notes:
First a little bit on buses. Firstly, bus stands for bi-directional universal switch.
There are two general buses, internal and external. The external bus connects the core processing parts of the computer (the CPU, cache and memory) all the other parts: storage devices, such as hard drives and optical drives, and peripheral devices such as mouse, keyboard, and monitor. The internal bus is made up of the address and the data bus; together they allow for transferral of addresses and data between the CPU and the cache and RAM memory themselves.
In terms of the difference between the two internal busses, basically the address bus carries requests from the CPU to the RAM for information stored at various specific memory addresses. It is (in fact will have to be) the physical width of the system architecture - 32 wires wide, or 64 wires wide - so as to accommodate all the combinations of addresses being sent at one time.
Meantime, the data bus, most of the time, finds itself carrying data from the RAM; that data will either be in the form of instruction, or it will be data itself. And for objects, that "data" will be the references. But it's still data, carried on the data bus, even though the data is an address. And regarding the data bus' bi-directional nature, it at times will carry processed data back from the accumulator register to be stored in RAM.
The syllabus statement is more geared toward how these buses link the various core processing and primary storage componenent.s